Along with the continuous advancement of computing systems and electronic communications, semiconductor memories which are used in reserving information are becoming cheaper to product, smaller in size, and larger in data capacities. Moreover, the ever-growing demand for energy efficiency, is now driving semiconductor memories to be operated with considerably less current consumption than before.
In the meantime, a dynamic random access memory (DRAM) has various types of drivers for conducting reading and writing operations. For example, reading operations of DRAMs can be executed by using input/output line sense-amplifier drivers for driving global input/output lines to accept data from a local input/output lines. The writing operations of DRAMs need data input drivers for driving the global input/output lines to receive input data from DQ pads.
Those drivers that are built within DRAMs are generally made up of metal-oxide-semiconductor (MOS) transistors. Since the current characteristics performance of MOS transistors drops down greatly under low power voltage (VDD) conditions, then current drivability performance is prone to degrading. For this reason, those MOS transistors drivers powered by low power conditions must be configured to be larger than others in the DRAM, in order to assure stable drivability.
However, when the reading or writing operations are not needed, e.g., when in power down modes, leakage current can still flow through these MOS transistors of the drivers that are shut down. Therefore, a larger size of the MOS transistor for needed for achieving higher drivability in low power voltage conditions can result in causing an increase in leakage current.